{"id":321,"date":"2026-05-25T05:25:11","date_gmt":"2026-05-25T05:25:11","guid":{"rendered":"https:\/\/voice.lapaas.com\/?p=321"},"modified":"2026-05-25T05:25:13","modified_gmt":"2026-05-25T05:25:13","slug":"huawei-plans-1-4-nm-chips-by-2031","status":"publish","type":"post","link":"https:\/\/voice.lapaas.com\/?p=321","title":{"rendered":"Huawei plans 1.4-nm chips by 2031"},"content":{"rendered":"\n<p class=\"wp-block-paragraph\">In a major bid to bypass crippling U.S. technology sanctions, China\u2019s Huawei Technologies has unveiled an ambitious semiconductor roadmap, projecting the design of high-end chips with a <strong>transistor density equivalent to a 1.4-nanometer (1.4-nm) process node by 2031.<sup><\/sup><\/strong><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">The announcement was made on Monday, May 25, 2026, by He Tingbo\u2014President of Huawei\u2019s HiSilicon semiconductor division and chair of the company&#8217;s Scientist Committee\u2014during a keynote speech at the <strong>2026 IEEE International Symposium on Circuits and Systems (ISCAS)<\/strong> in Shanghai.<sup><\/sup><\/p>\n\n\n\n<h3 class=\"wp-block-heading\">1. The Strategy: Sidestepping Traditional Moore&#8217;s Law<sup><\/sup><\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">Because Washington has strictly blocked China&#8217;s access to advanced Extreme Ultraviolet (EUV) lithography equipment from ASML, Chinese foundries cannot easily manufacture chips using traditional geometric shrinking.<sup><\/sup><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">To overcome this, Huawei introduced a new architectural framework called the <strong>Tau (<sup><\/sup>$\\tau$) Scaling Law<\/strong> (referred to by some industry peers as <em>He&#8217;s Law<\/em>).<sup><\/sup><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Time Over Geometry:<\/strong> Traditional chip scaling relies on making transistors physically smaller (node scaling). The Tau Scaling Law flips the script by focusing on <strong>system-level efficiency scaling<\/strong>\u2014specifically cutting down the time (latency) it takes for data and electronic signals to propagate through devices, circuits, and systems.<\/li>\n\n\n\n<li><strong>The LogicFolding Solution:<\/strong> Alongside the scaling law, Huawei unveiled its <strong>LogicFolding<\/strong> architecture. This design dramatically shortens the physical wiring inside a chip, reducing resistive and capacitive loads. By stacking silicon and optimizing internal interconnects, Huawei claims it can mimic the performance and transistor density of a 1.4-nm node without requiring the tight sub-atomic physical engraving of Western foundries.<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\">2. Slicing Open the Roadmap: 2026 to 2031<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">Huawei stressed that this isn&#8217;t just a theoretical research paper. The company claims it has quietly designed and mass-produced <strong>381 distinct chips over the past six years<\/strong> utilizing early variations of this system-level architecture.<sup><\/sup><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">The upcoming deployment schedule aims to directly challenge Western silicon pacesetters:<\/p>\n\n\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><td><strong>Target Era \/ Release<\/strong><\/td><td><strong>Chip Lineup Affected<\/strong><\/td><td><strong>Architectural Focus &amp; Milestones<\/strong><\/td><\/tr><\/thead><tbody><tr><td><strong>Autumn 2026<\/strong><\/td><td><strong>Kirin Smartphone Processors<\/strong><\/td><td>Will be the commercial debut of the <strong>LogicFolding<\/strong> architecture, drastically shortening internal signal paths to boost efficiency.<\/td><\/tr><tr><td><strong>2026\u20132028<\/strong><\/td><td><strong>Ascend AI Chips<\/strong> <em>(950, 960, and 970 series)<\/em><\/td><td>Retooling data center hardware to establish a robust domestic alternative to Nvidia&#8217;s computing architecture.<\/td><\/tr><tr><td><strong>By 2031<\/strong><\/td><td><strong>Next-Gen Frontier Silicon<\/strong><\/td><td>Target window to hit <strong>1.4-nm class transistor density equivalence<\/strong> via complete system-level optimization.<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\">3. Industry Realism vs. Geopolitical Insulations<\/h3>\n\n\n\n<p class=\"wp-block-paragraph\">Independent semiconductor analysts view Huawei\u2019s 1.4-nm equivalent target with a mix of fascination and caution.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">On one hand, tech firms like TSMC are already targeting true, native 1.4-nm physical mass production by 2028.<sup><\/sup> Huawei&#8217;s 2031 timeline for <em>density equivalence<\/em> means China will technically remain a few years behind the absolute global manufacturing frontier.<sup><\/sup> Furthermore, Huawei has not yet published independent, third-party performance or toxicological yield data to validate its laboratory benchmarks.<sup><\/sup><\/p>\n\n\n\n<p class=\"wp-block-paragraph\">On the other hand, industry experts from firms like Omdia point out that system-level scaling\u2014relying on advanced packaging, 3D chiplet stacking, and signal path compression\u2014is a highly credible way to squeeze bleeding-edge performance out of older, legally available manufacturing equipment. By formalizing the Tau Scaling Law, Huawei is building a vital blueprint to insulate China&#8217;s domestic AI, smartphone, and supercomputing infrastructure from future Western trade embargoes.<sup><\/sup><\/p>\n","protected":false},"excerpt":{"rendered":"<p>In a major bid to bypass crippling U.S. technology sanctions, China\u2019s Huawei Technologies has unveiled an ambitious semiconductor roadmap, projecting the design of high-end chips with a transistor density equivalent to a 1.4-nanometer (1.4-nm) process node by 2031. The announcement was made on Monday, May 25, 2026, by He Tingbo\u2014President of Huawei\u2019s HiSilicon semiconductor division [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":322,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-321","post","type-post","status-publish","format-standard","has-post-thumbnail","category-uncategorized"],"_links":{"self":[{"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=\/wp\/v2\/posts\/321","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=321"}],"version-history":[{"count":1,"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=\/wp\/v2\/posts\/321\/revisions"}],"predecessor-version":[{"id":323,"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=\/wp\/v2\/posts\/321\/revisions\/323"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=\/wp\/v2\/media\/322"}],"wp:attachment":[{"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=321"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=321"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/voice.lapaas.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=321"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}