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AMD may shift chip production from TSMC to Samsung

In a move that could break the long-standing “monopoly” of the semiconductor supply chain, AMD CEO Lisa Su and Samsung Electronics Vice Chairman Jun Young-hyun signed a high-stakes Memorandum of Understanding (MoU) on March 18, 2026. The agreement officially expands their partnership into next-generation foundry services and AI memory, marking a potential shift for AMD away from its total reliance on TSMC.

The “2nm” Breakthrough

The most significant part of the discussion involves Samsung’s 2-nanometer (SF2P) Gate-All-Around (GAA) process. As TSMC’s 2nm capacity becomes almost entirely “booked out” by Apple and NVIDIA for 2026–2027, AMD is looking at Samsung as a critical secondary source.

  • The Pilot Project: Samsung is reportedly preparing a Multi-Project Wafer (MPW) run for AMD. This is a trial phase to see if Samsung’s 2nm performance meets the standards for AMD’s next-gen server CPU, codenamed “Venice” (6th Gen EPYC).
  • The Yield Advantage: While Samsung struggled with 3nm, recent reports suggest its 2nm GAA yields have hit 70% as of early 2026—a “turning point” that has made the foundry a viable alternative for high-performance computing (HPC).
  • Dual-Sourcing Strategy: Industry insiders suggest AMD may adopt a “split” approach: using TSMC for its flagship consumer Ryzen “Olympic Ridge” chips while shifting high-volume AI and server silicon to Samsung to ensure supply stability.

The “Turnkey” AI Alliance

Beyond just manufacturing the chips, Samsung is offering a “turnkey” solution that TSMC currently cannot match in-house: Logic + HBM + Packaging.

  1. HBM4 Primary Supplier: Samsung will be the primary provider of HBM4 (6th Gen High Bandwidth Memory) for AMD’s upcoming Instinct MI455X AI accelerators.
  2. Advanced Packaging: AMD is evaluating Samsung’s advanced 2.5D and 3D packaging technologies to integrate these memory stacks directly with the 2nm logic dies.
  3. DDR5 for Venice: Samsung will also supply optimized DDR5 DRAM specifically tailored for the 6th Gen EPYC “Venice” processors and the AMD Helios rack-scale AI platform.

Why AMD is Moving Now

The pivot is driven by two brutal realities of the 2026 chip market: Capacity and Cost.

FactorTSMC (N2 / 2nm)Samsung (SF2P / 2nm)
Availability~95% booked (Apple/NVIDIA)Capacity Available (AMD/Tesla)
Wafer Price~$30,000 (No Discounts)Competitive / Flexible Pricing
ArchitectureNanosheet (First Gen)GAA (3rd Gen Maturity)
Turnkey ScopeLogic Only (External HBM)Full Stack (Logic + HBM + PKG)

Geopolitical & Strategic Impact

This “homecoming” to Samsung (AMD previously used Samsung for 14nm) is seen as a win for “Silicon Sovereignty.” By diversifying into Samsung’s Texas-based Taylor plant and its Korean facilities, AMD reduces its “Taiwan risk” at a time when TSMC is facing immense pressure to prioritize NVIDIA’s Blackwell and Feynman architectures.

For Samsung, securing AMD—following its $16.5 billion Tesla AI6 deal—acts as a “seal of approval.” It transforms the foundry market from a TSMC monopoly into a true duopoly, giving chip designers the bargaining power they have lacked for half a decade.

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